Accelerating embedded image processing for real time: a case study

Mostrar todas las versiones(2)

Many image processing applications need real-time performance, while having restrictions of size, weight and power consumption. Common solutions, including hardware/software co-designs, are based on Field Programmable Gate Arrays (FPGAs). Their main drawback is long development time. In this work, a...

Descripción completa

Guardado en:

Detalles Bibliográficos
Autores principales:	Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P.
Formato:	INPR
Lenguaje:	English
Materias:	Hardware acceleration High level modeling High level synthesis Methodology for hardware/software co-design in FPGA Multiple robot localization Multithreaded programming Real-time image processing
Acceso en línea:	http://hdl.handle.net/20.500.12110/paper_18618200_v_n_p1_Pedre
Aporte de:	Biblioteca Digital - Facultad de Ciencias Exactas y Naturales (UBA) de Universidad de Buenos Aires

id	todo:paper_18618200_v_n_p1_Pedre
record_format	dspace
spelling	todo:paper_18618200_v_n_p1_Pedre2023-10-03T16:33:23Z Accelerating embedded image processing for real time: a case study Pedre, S. Krajník, T. Todorovich, E. Borensztejn, P. Hardware acceleration High level modeling High level synthesis Methodology for hardware/software co-design in FPGA Multiple robot localization Multithreaded programming Real-time image processing Many image processing applications need real-time performance, while having restrictions of size, weight and power consumption. Common solutions, including hardware/software co-designs, are based on Field Programmable Gate Arrays (FPGAs). Their main drawback is long development time. In this work, a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is proposed. The goal of this methodology is to achieve real-time embedded solutions, using hardware acceleration, but achieving development time similar to that of software projects. Well established methodologies, techniques and languages from the software domain-such as Object-Oriented Paradigm design, Unified Modelling Language, and multithreading programming-are applied; and semiautomatic C-to-HDL translation tools and methods are used and compared. The methodology is applied to achieve an embedded implementation of a global vision algorithm for the localization of multiple robots in an e-learning robotic laboratory. The algorithm is specifically developed to work reliably 24/7 and to detect the robot's positions and headings even in the presence of partial occlusions and varying lighting conditions expectable in a normal classroom. The co-designed implementation of this algorithm processes 1,600 × 1,200 pixel images at a rate of 32 fps with an estimated energy consumption of 17 mJ per frame. It achieves a 16× acceleration and 92 % energy saving, which compares favorably with the most optimized embedded software solutions. This case study shows the usefulness of the proposed methodology for embedded real-time image processing applications. © 2013 Springer-Verlag Berlin Heidelberg. Fil:Pedre, S. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales; Argentina. INPR English info:eu-repo/semantics/openAccess http://creativecommons.org/licenses/by/2.5/ar http://hdl.handle.net/20.500.12110/paper_18618200_v_n_p1_Pedre
institution	Universidad de Buenos Aires
institution_str	I-28
repository_str	R-134
collection	Biblioteca Digital - Facultad de Ciencias Exactas y Naturales (UBA)
language	English
orig_language_str_mv	English
topic	Hardware acceleration High level modeling High level synthesis Methodology for hardware/software co-design in FPGA Multiple robot localization Multithreaded programming Real-time image processing
spellingShingle	Hardware acceleration High level modeling High level synthesis Methodology for hardware/software co-design in FPGA Multiple robot localization Multithreaded programming Real-time image processing Pedre, S. Krajník, T. Todorovich, E. Borensztejn, P. Accelerating embedded image processing for real time: a case study
topic_facet	Hardware acceleration High level modeling High level synthesis Methodology for hardware/software co-design in FPGA Multiple robot localization Multithreaded programming Real-time image processing
description	Many image processing applications need real-time performance, while having restrictions of size, weight and power consumption. Common solutions, including hardware/software co-designs, are based on Field Programmable Gate Arrays (FPGAs). Their main drawback is long development time. In this work, a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is proposed. The goal of this methodology is to achieve real-time embedded solutions, using hardware acceleration, but achieving development time similar to that of software projects. Well established methodologies, techniques and languages from the software domain-such as Object-Oriented Paradigm design, Unified Modelling Language, and multithreading programming-are applied; and semiautomatic C-to-HDL translation tools and methods are used and compared. The methodology is applied to achieve an embedded implementation of a global vision algorithm for the localization of multiple robots in an e-learning robotic laboratory. The algorithm is specifically developed to work reliably 24/7 and to detect the robot's positions and headings even in the presence of partial occlusions and varying lighting conditions expectable in a normal classroom. The co-designed implementation of this algorithm processes 1,600 × 1,200 pixel images at a rate of 32 fps with an estimated energy consumption of 17 mJ per frame. It achieves a 16× acceleration and 92 % energy saving, which compares favorably with the most optimized embedded software solutions. This case study shows the usefulness of the proposed methodology for embedded real-time image processing applications. © 2013 Springer-Verlag Berlin Heidelberg.
format	INPR
author	Pedre, S. Krajník, T. Todorovich, E. Borensztejn, P.
author_facet	Pedre, S. Krajník, T. Todorovich, E. Borensztejn, P.
author_sort	Pedre, S.
title	Accelerating embedded image processing for real time: a case study
title_short	Accelerating embedded image processing for real time: a case study
title_full	Accelerating embedded image processing for real time: a case study
title_fullStr	Accelerating embedded image processing for real time: a case study
title_full_unstemmed	Accelerating embedded image processing for real time: a case study
title_sort	accelerating embedded image processing for real time: a case study
url	http://hdl.handle.net/20.500.12110/paper_18618200_v_n_p1_Pedre
work_keys_str_mv	AT pedres acceleratingembeddedimageprocessingforrealtimeacasestudy AT krajnikt acceleratingembeddedimageprocessingforrealtimeacasestudy AT todoroviche acceleratingembeddedimageprocessingforrealtimeacasestudy AT borensztejnp acceleratingembeddedimageprocessingforrealtimeacasestudy
_version_	1782030629097963520

Accelerating embedded image processing for real time: a case study

Ejemplares similares