On the dynamics of a single-bit stochastic-resonance memory device

The increasing capacity of modern computers, driven by Moore's Law, is accompanied by smaller noise margins and higher error rates. In this paper we propose a memory device, consisting of a ring of two identical overdamped bistable forward-coupled oscillators, which may serve as a building bloc...

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Autores principales: Ibáñez, S.A., Fierens, P.I., Perazzo, R.P.J., Patterson, G.A., Grosz, D.F.
Formato: JOUR
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Acceso en línea:http://hdl.handle.net/20.500.12110/paper_14346028_v76_n1_p49_Ibanez
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spelling todo:paper_14346028_v76_n1_p49_Ibanez2023-10-03T16:14:34Z On the dynamics of a single-bit stochastic-resonance memory device Ibáñez, S.A. Fierens, P.I. Perazzo, R.P.J. Patterson, G.A. Grosz, D.F. Bistables Building blockes Coupled oscillators Error rate Memory device Moore's Law Noise margins Noise range Probability of errors Schmitt trigger Single-bit Synchronization time Oscillators (electronic) The increasing capacity of modern computers, driven by Moore's Law, is accompanied by smaller noise margins and higher error rates. In this paper we propose a memory device, consisting of a ring of two identical overdamped bistable forward-coupled oscillators, which may serve as a building block in a larger scale solution to this problem. We show that such a system is capable of storing a single bit and its performance improves with the addition of noise. The proposed device can be regarded as asynchronous, in the sense that stored information can be retrieved at any time and, after a certain synchronization time, the probability of erroneous retrieval does not depend on which oscillator is being interrogated. We characterize memory persistence time and show it to be maximized for the same noise range that both minimizes the probability of error and ensures synchronization. We also present experimental results for a hard-wired version of the proposed memory, consisting of a loop of two Schmitt triggers. We show that this device is capable of storing a single bit and does so more efficiently in the presence of noise. © 2010 EDP Sciences, SIF, Springer-Verlag Berlin Heidelberg. Fil:Perazzo, R.P.J. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales; Argentina. Fil:Grosz, D.F. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales; Argentina. JOUR info:eu-repo/semantics/openAccess http://creativecommons.org/licenses/by/2.5/ar http://hdl.handle.net/20.500.12110/paper_14346028_v76_n1_p49_Ibanez
institution Universidad de Buenos Aires
institution_str I-28
repository_str R-134
collection Biblioteca Digital - Facultad de Ciencias Exactas y Naturales (UBA)
topic Bistables
Building blockes
Coupled oscillators
Error rate
Memory device
Moore's Law
Noise margins
Noise range
Probability of errors
Schmitt trigger
Single-bit
Synchronization time
Oscillators (electronic)
spellingShingle Bistables
Building blockes
Coupled oscillators
Error rate
Memory device
Moore's Law
Noise margins
Noise range
Probability of errors
Schmitt trigger
Single-bit
Synchronization time
Oscillators (electronic)
Ibáñez, S.A.
Fierens, P.I.
Perazzo, R.P.J.
Patterson, G.A.
Grosz, D.F.
On the dynamics of a single-bit stochastic-resonance memory device
topic_facet Bistables
Building blockes
Coupled oscillators
Error rate
Memory device
Moore's Law
Noise margins
Noise range
Probability of errors
Schmitt trigger
Single-bit
Synchronization time
Oscillators (electronic)
description The increasing capacity of modern computers, driven by Moore's Law, is accompanied by smaller noise margins and higher error rates. In this paper we propose a memory device, consisting of a ring of two identical overdamped bistable forward-coupled oscillators, which may serve as a building block in a larger scale solution to this problem. We show that such a system is capable of storing a single bit and its performance improves with the addition of noise. The proposed device can be regarded as asynchronous, in the sense that stored information can be retrieved at any time and, after a certain synchronization time, the probability of erroneous retrieval does not depend on which oscillator is being interrogated. We characterize memory persistence time and show it to be maximized for the same noise range that both minimizes the probability of error and ensures synchronization. We also present experimental results for a hard-wired version of the proposed memory, consisting of a loop of two Schmitt triggers. We show that this device is capable of storing a single bit and does so more efficiently in the presence of noise. © 2010 EDP Sciences, SIF, Springer-Verlag Berlin Heidelberg.
format JOUR
author Ibáñez, S.A.
Fierens, P.I.
Perazzo, R.P.J.
Patterson, G.A.
Grosz, D.F.
author_facet Ibáñez, S.A.
Fierens, P.I.
Perazzo, R.P.J.
Patterson, G.A.
Grosz, D.F.
author_sort Ibáñez, S.A.
title On the dynamics of a single-bit stochastic-resonance memory device
title_short On the dynamics of a single-bit stochastic-resonance memory device
title_full On the dynamics of a single-bit stochastic-resonance memory device
title_fullStr On the dynamics of a single-bit stochastic-resonance memory device
title_full_unstemmed On the dynamics of a single-bit stochastic-resonance memory device
title_sort on the dynamics of a single-bit stochastic-resonance memory device
url http://hdl.handle.net/20.500.12110/paper_14346028_v76_n1_p49_Ibanez
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AT fierenspi onthedynamicsofasinglebitstochasticresonancememorydevice
AT perazzorpj onthedynamicsofasinglebitstochasticresonancememorydevice
AT pattersonga onthedynamicsofasinglebitstochasticresonancememorydevice
AT groszdf onthedynamicsofasinglebitstochasticresonancememorydevice
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