A scheduler synthesis methodology for joint SW/HW design exploration of SoC

The introduction of high-performance applications such as multimedia applications into SoCs led the manufacturers to provide embedded SoCs able to offer an important computing power which makes it possible to answer the increasing requirements of future evolutions of these applications. One of the a...

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Detalles Bibliográficos
Autores principales: Assayad, I., Yovine, S.
Formato: JOUR
Materias:
Exploration
Multiprocessor system-on-chips (SoCs)
Real-time requirements
Scheduling
SW/HW design
Component-based models
Computing power
High performance applications
MPEG-4 video encoders
Multi-processor hardware
Multimedia applications
Multiprocessor system on chips
Parallel software
Real time requirement
Synthesis methodology
Synthesis techniques
System models
Design
Motion Picture Experts Group standards
Timing jitter
Multiprocessing systems
Acceso en línea:http://hdl.handle.net/20.500.12110/paper_09295585_v14_n2_p75_Assayad
Aporte de:
Biblioteca Digital - Facultad de Ciencias Exactas y Naturales (UBA) de Universidad de Buenos Aires

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