Assayad, I., & Yovine, S. A scheduler synthesis methodology for joint SW/HW design exploration of SoC.
Cita Chicago Style (17a ed.)Assayad, I., y S. Yovine. A Scheduler Synthesis Methodology for Joint SW/HW Design Exploration of SoC.
Cita MLA (8a ed.)Assayad, I., y S. Yovine. A Scheduler Synthesis Methodology for Joint SW/HW Design Exploration of SoC.
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