Design of ESD protections for ECG applications

"This paper presents the design of Electrostatic Discharge (ESD) protections for a remote Electroencephalograph (ECG). Design and layout guidelines are analyzed to improve the ESD robustness of a Grounded-Gate NMOS (GGNMOS) cell based on a single well CMOS-only process. Experimental validation...

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Detalles Bibliográficos
Autores principales: Gardella, Pablo, Baez, Eduardo, Cesaretti, Juan Manuel
Formato: Ponencias en Congresos acceptedVersion
Lenguaje:Inglés
Publicado: 2020
Materias:
ELECTROENCEFALOGRAFIA
CIRCUITOS INTEGRADOS
Acceso en línea:http://ri.itba.edu.ar/handle/123456789/2216
Aporte de:
Repositorio Institucional Instituto Tecnológico de Buenos Aires (ITBA) de Instituto Tecnológico de Buenos Aires (ITBA)
Descripción
Sumario:"This paper presents the design of Electrostatic Discharge (ESD) protections for a remote Electroencephalograph (ECG). Design and layout guidelines are analyzed to improve the ESD robustness of a Grounded-Gate NMOS (GGNMOS) cell based on a single well CMOS-only process. Experimental validation is done by means of a Time Domain Reflectometry (TDR) technique known as Transmission Line Pulse (TLP) testing. The silicon implementation of the proposed design passes ±3700V in the Human-Body Model (HBM)."

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