Design of ESD protections for ECG applications

"This paper presents the design of Electrostatic Discharge (ESD) protections for a remote Electroencephalograph (ECG). Design and layout guidelines are analyzed to improve the ESD robustness of a Grounded-Gate NMOS (GGNMOS) cell based on a single well CMOS-only process. Experimental validation...

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Autores principales: Gardella, Pablo, Baez, Eduardo, Cesaretti, Juan Manuel
Formato: Ponencias en Congresos acceptedVersion
Lenguaje:Inglés
Publicado: 2020
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Acceso en línea:http://ri.itba.edu.ar/handle/123456789/2216
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spelling I32-R138-123456789-22162022-12-07T14:14:00Z Design of ESD protections for ECG applications Gardella, Pablo Baez, Eduardo Cesaretti, Juan Manuel ELECTROENCEFALOGRAFIA CIRCUITOS INTEGRADOS "This paper presents the design of Electrostatic Discharge (ESD) protections for a remote Electroencephalograph (ECG). Design and layout guidelines are analyzed to improve the ESD robustness of a Grounded-Gate NMOS (GGNMOS) cell based on a single well CMOS-only process. Experimental validation is done by means of a Time Domain Reflectometry (TDR) technique known as Transmission Line Pulse (TLP) testing. The silicon implementation of the proposed design passes ±3700V in the Human-Body Model (HBM)." 2020-06-24T16:00:33Z 2020-06-24T16:00:33Z 2020-02 Ponencias en Congresos info:eu-repo/semantics/acceptedVersion 978-1728-16-195-2 http://ri.itba.edu.ar/handle/123456789/2216 en info:eu-repo/semantics/altIdentifier/doi/10.1109/CAE48787.2020.9046370 application/pdf
institution Instituto Tecnológico de Buenos Aires (ITBA)
institution_str I-32
repository_str R-138
collection Repositorio Institucional Instituto Tecnológico de Buenos Aires (ITBA)
language Inglés
topic ELECTROENCEFALOGRAFIA
CIRCUITOS INTEGRADOS
spellingShingle ELECTROENCEFALOGRAFIA
CIRCUITOS INTEGRADOS
Gardella, Pablo
Baez, Eduardo
Cesaretti, Juan Manuel
Design of ESD protections for ECG applications
topic_facet ELECTROENCEFALOGRAFIA
CIRCUITOS INTEGRADOS
description "This paper presents the design of Electrostatic Discharge (ESD) protections for a remote Electroencephalograph (ECG). Design and layout guidelines are analyzed to improve the ESD robustness of a Grounded-Gate NMOS (GGNMOS) cell based on a single well CMOS-only process. Experimental validation is done by means of a Time Domain Reflectometry (TDR) technique known as Transmission Line Pulse (TLP) testing. The silicon implementation of the proposed design passes ±3700V in the Human-Body Model (HBM)."
format Ponencias en Congresos
acceptedVersion
author Gardella, Pablo
Baez, Eduardo
Cesaretti, Juan Manuel
author_facet Gardella, Pablo
Baez, Eduardo
Cesaretti, Juan Manuel
author_sort Gardella, Pablo
title Design of ESD protections for ECG applications
title_short Design of ESD protections for ECG applications
title_full Design of ESD protections for ECG applications
title_fullStr Design of ESD protections for ECG applications
title_full_unstemmed Design of ESD protections for ECG applications
title_sort design of esd protections for ecg applications
publishDate 2020
url http://ri.itba.edu.ar/handle/123456789/2216
work_keys_str_mv AT gardellapablo designofesdprotectionsforecgapplications
AT baezeduardo designofesdprotectionsforecgapplications
AT cesarettijuanmanuel designofesdprotectionsforecgapplications
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