Hardware/software co-design for real time embedded image processing: A case study

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Many image processing applications need real time performance, while having restrictions of size, weight and power consumption. These include a wide range of embedded systems from remote sensing applications to mobile phones. FPGA-based solutions are common for these applications, their main drawbac...

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Autores principales: Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P.
Formato: Artículo publishedVersion
Publicado: 2012
Materias:
FPGA
hardware/software co-design methodology
real time image processing
robotics
Co-design methodology
Development time
Hardware acceleration
Hardware/software co-design
Image processing - methods
Image processing applications
Multiple robot
PC-based
Pixel images
Real time
Real time performance
Real-time image processing
Remote sensing applications
Software project
Software solution
Solution process
Computer vision
Field programmable gate arrays (FPGA)
Global system for mobile communications
Hardware
Image analysis
Remote sensing
Robotics
Embedded systems
Acceso en línea:http://hdl.handle.net/20.500.12110/paper_03029743_v7441LNCS_n_p599_Pedre
http://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=artiaex&d=paper_03029743_v7441LNCS_n_p599_Pedre_oai
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Repositorio Digital de la Universidad de Buenos Aires (UBA) de Universidad de Buenos Aires
id I28-R145-paper_03029743_v7441LNCS_n_p599_Pedre_oai
record_format dspace
spelling I28-R145-paper_03029743_v7441LNCS_n_p599_Pedre_oai2020-10-19 Pedre, S. Krajník, T. Todorovich, E. Borensztejn, P. 2012 Many image processing applications need real time performance, while having restrictions of size, weight and power consumption. These include a wide range of embedded systems from remote sensing applications to mobile phones. FPGA-based solutions are common for these applications, their main drawback being long development time. In this work a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is applied to an image processing method for localization of multiple robots. The goal of the methodology is to achieve a real-time embedded solution using hardware acceleration, but with development time similar to software projects. The final embedded co-designed solution processes 1600×1200 pixel images at a rate of 25 fps, achieving a 12.6× acceleration from the original software solution. This solution runs with a comparable speed as up-to-date PC-based systems, and it is smaller, cheaper and demands less power. © 2012 Springer-Verlag. Fil:Pedre, S. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales; Argentina. application/pdf http://hdl.handle.net/20.500.12110/paper_03029743_v7441LNCS_n_p599_Pedre info:eu-repo/semantics/openAccess http://creativecommons.org/licenses/by/2.5/ar Lect. Notes Comput. Sci. 2012;7441 LNCS:599-606 FPGA hardware/software co-design methodology real time image processing robotics Co-design methodology Development time Hardware acceleration Hardware/software co-design Image processing - methods Image processing applications Multiple robot PC-based Pixel images Real time Real time performance Real-time image processing Remote sensing applications Software project Software solution Solution process Computer vision Field programmable gate arrays (FPGA) Global system for mobile communications Hardware Image analysis Remote sensing Robotics Embedded systems Hardware/software co-design for real time embedded image processing: A case study info:eu-repo/semantics/article info:ar-repo/semantics/artículo info:eu-repo/semantics/publishedVersion http://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=artiaex&d=paper_03029743_v7441LNCS_n_p599_Pedre_oai
institution Universidad de Buenos Aires
institution_str I-28
repository_str R-145
collection Repositorio Digital de la Universidad de Buenos Aires (UBA)
topic FPGA
hardware/software co-design methodology
real time image processing
robotics
Co-design methodology
Development time
Hardware acceleration
Hardware/software co-design
Image processing - methods
Image processing applications
Multiple robot
PC-based
Pixel images
Real time
Real time performance
Real-time image processing
Remote sensing applications
Software project
Software solution
Solution process
Computer vision
Field programmable gate arrays (FPGA)
Global system for mobile communications
Hardware
Image analysis
Remote sensing
Robotics
Embedded systems
spellingShingle FPGA
hardware/software co-design methodology
real time image processing
robotics
Co-design methodology
Development time
Hardware acceleration
Hardware/software co-design
Image processing - methods
Image processing applications
Multiple robot
PC-based
Pixel images
Real time
Real time performance
Real-time image processing
Remote sensing applications
Software project
Software solution
Solution process
Computer vision
Field programmable gate arrays (FPGA)
Global system for mobile communications
Hardware
Image analysis
Remote sensing
Robotics
Embedded systems
Pedre, S.
Krajník, T.
Todorovich, E.
Borensztejn, P.
Hardware/software co-design for real time embedded image processing: A case study
topic_facet FPGA
hardware/software co-design methodology
real time image processing
robotics
Co-design methodology
Development time
Hardware acceleration
Hardware/software co-design
Image processing - methods
Image processing applications
Multiple robot
PC-based
Pixel images
Real time
Real time performance
Real-time image processing
Remote sensing applications
Software project
Software solution
Solution process
Computer vision
Field programmable gate arrays (FPGA)
Global system for mobile communications
Hardware
Image analysis
Remote sensing
Robotics
Embedded systems
description Many image processing applications need real time performance, while having restrictions of size, weight and power consumption. These include a wide range of embedded systems from remote sensing applications to mobile phones. FPGA-based solutions are common for these applications, their main drawback being long development time. In this work a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is applied to an image processing method for localization of multiple robots. The goal of the methodology is to achieve a real-time embedded solution using hardware acceleration, but with development time similar to software projects. The final embedded co-designed solution processes 1600×1200 pixel images at a rate of 25 fps, achieving a 12.6× acceleration from the original software solution. This solution runs with a comparable speed as up-to-date PC-based systems, and it is smaller, cheaper and demands less power. © 2012 Springer-Verlag.
format Artículo
Artículo
publishedVersion
author Pedre, S.
Krajník, T.
Todorovich, E.
Borensztejn, P.
author_facet Pedre, S.
Krajník, T.
Todorovich, E.
Borensztejn, P.
author_sort Pedre, S.
title Hardware/software co-design for real time embedded image processing: A case study
title_short Hardware/software co-design for real time embedded image processing: A case study
title_full Hardware/software co-design for real time embedded image processing: A case study
title_fullStr Hardware/software co-design for real time embedded image processing: A case study
title_full_unstemmed Hardware/software co-design for real time embedded image processing: A case study
title_sort hardware/software co-design for real time embedded image processing: a case study
publishDate 2012
url http://hdl.handle.net/20.500.12110/paper_03029743_v7441LNCS_n_p599_Pedre
http://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=artiaex&d=paper_03029743_v7441LNCS_n_p599_Pedre_oai
work_keys_str_mv AT pedres hardwaresoftwarecodesignforrealtimeembeddedimageprocessingacasestudy
AT krajnikt hardwaresoftwarecodesignforrealtimeembeddedimageprocessingacasestudy
AT todoroviche hardwaresoftwarecodesignforrealtimeembeddedimageprocessingacasestudy
AT borensztejnp hardwaresoftwarecodesignforrealtimeembeddedimageprocessingacasestudy
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