Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs
The use of image processing systems is becoming frequent and is appropriate in edge computing. However, the demands on power consumption and high performance prevent the use of standard processing platforms. Thus, FPGAs are a good option for the development of computer vision systems because they ar...
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| Formato: | Artículo publishedVersion |
| Lenguaje: | Español |
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FIUBA
2020
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| Acceso en línea: | https://elektron.fi.uba.ar/elektron/article/view/109 https://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=elektron&d=109_oai |
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I28-R145-109_oai2026-02-11 Medina, Tomás Leiva, Lucas Vázquez, Martín 2020-12-14 The use of image processing systems is becoming frequent and is appropriate in edge computing. However, the demands on power consumption and high performance prevent the use of standard processing platforms. Thus, FPGAs are a good option for the development of computer vision systems because they are capable of exploiting parallelism. On the other hand, the design flow of current FPGA synthesis tools supports high-level languages as input descriptions, in contrast to hardware description languages. High-level synthesis (HLS) automates the design process by transforming an algorithmic description into digital hardware meeting design limitations. However, image processing experts may find challenging the hardware integration with the rest of the system components, e.g. capture and display interfaces. This work presents a basic design for the construction of image processing applications based on Zynq and a guide for its use, which solves this problem, allowing the agile generation of embedded image processing solutions. Additionally, a methodology is provided, which facilitates the efficient development of image processing embedded solutions in an agile way. La aplicación de sistemas de procesamiento de imágenes en edge computing resulta cada vez más atractiva y necesaria. Sin embargo, las exigencias en cuanto a consumo de potencia y alto rendimiento impiden que puedan utilizarse plataformas de procesamiento estándares. En este aspecto, los FPGA son una buena opción para el desarrollo de sistemas de visión computacional a causa de su capacidad de explotación del paralelismo. Por otra parte, el flujo de diseño de las herramientas de síntesis de FPGA actuales admiten lenguajes de alta abstracción como descripciones de entrada, en contraposición a los lenguajes de descripción de hardware. La síntesis de alto nivel (HLS) automatiza el proceso de diseño al transformar la descripción algorítmica en hardware digital mientras se satisfacen las limitaciones del diseño. Sin embargo, a los expertos en procesamiento de imágenes puede resultarles compleja la integración hardware obtenida con el resto de los componentes del sistema, como por ejemplo interfaces de captura y visualización. En este trabajo, se presenta un diseño base para la construcción de aplicaciones de procesamiento de imágenes basada en Zynq. Se proporciona además una metodología que posibilita el desarrollo eficiente de soluciones de procesamiento de imágenes embebidas de manera ágil. application/pdf text/html https://elektron.fi.uba.ar/elektron/article/view/109 10.37537/rev.elektron.4.2.109.2020 spa FIUBA https://elektron.fi.uba.ar/elektron/article/view/109/204 https://elektron.fi.uba.ar/elektron/article/view/109/222 Derechos de autor 2020 Tomás Medina, Lucas Leiva, Martín Vázquez Elektron Journal; Vol. 4 No. 2 (2020); 81-86 Revista Elektron; Vol. 4 Núm. 2 (2020); 81-86 Revista Elektron; v. 4 n. 2 (2020); 81-86 2525-0159 2525-0159 image processing HLS Zynq procesamiento de imágenes HLS Zynq Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs Plataforma para Procesamiento de Imágenes sobre SoC FPGA de Xilinx info:eu-repo/semantics/article info:eu-repo/semantics/publishedVersion https://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=elektron&d=109_oai |
| institution |
Universidad de Buenos Aires |
| institution_str |
I-28 |
| repository_str |
R-145 |
| collection |
Repositorio Digital de la Universidad de Buenos Aires (UBA) |
| language |
Español |
| orig_language_str_mv |
spa |
| topic |
image processing HLS Zynq procesamiento de imágenes HLS Zynq |
| spellingShingle |
image processing HLS Zynq procesamiento de imágenes HLS Zynq Medina, Tomás Leiva, Lucas Vázquez, Martín Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs |
| topic_facet |
image processing HLS Zynq procesamiento de imágenes HLS Zynq |
| description |
The use of image processing systems is becoming frequent and is appropriate in edge computing. However, the demands on power consumption and high performance prevent the use of standard processing platforms. Thus, FPGAs are a good option for the development of computer vision systems because they are capable of exploiting parallelism. On the other hand, the design flow of current FPGA synthesis tools supports high-level languages as input descriptions, in contrast to hardware description languages. High-level synthesis (HLS) automates the design process by transforming an algorithmic description into digital hardware meeting design limitations. However, image processing experts may find challenging the hardware integration with the rest of the system components, e.g. capture and display interfaces. This work presents a basic design for the construction of image processing applications based on Zynq and a guide for its use, which solves this problem, allowing the agile generation of embedded image processing solutions. Additionally, a methodology is provided, which facilitates the efficient development of image processing embedded solutions in an agile way. |
| format |
Artículo publishedVersion |
| author |
Medina, Tomás Leiva, Lucas Vázquez, Martín |
| author_facet |
Medina, Tomás Leiva, Lucas Vázquez, Martín |
| author_sort |
Medina, Tomás |
| title |
Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs |
| title_short |
Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs |
| title_full |
Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs |
| title_fullStr |
Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs |
| title_full_unstemmed |
Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs |
| title_sort |
platform for the development of image processing applications on xilinx soc fpgas |
| publisher |
FIUBA |
| publishDate |
2020 |
| url |
https://elektron.fi.uba.ar/elektron/article/view/109 https://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=elektron&d=109_oai |
| work_keys_str_mv |
AT medinatomas platformforthedevelopmentofimageprocessingapplicationsonxilinxsocfpgas AT leivalucas platformforthedevelopmentofimageprocessingapplicationsonxilinxsocfpgas AT vazquezmartin platformforthedevelopmentofimageprocessingapplicationsonxilinxsocfpgas AT medinatomas plataformaparaprocesamientodeimagenessobresocfpgadexilinx AT leivalucas plataformaparaprocesamientodeimagenessobresocfpgadexilinx AT vazquezmartin plataformaparaprocesamientodeimagenessobresocfpgadexilinx |
| _version_ |
1857042977732427776 |