Memory disambiguation hardware: a review

One of the main challenges of modern processor designs is the implementation of scalable and efficient mechanisms to detect memory access order violations as a result of out-of-order execution. Conventional structures performing this task are complex, inefficient and power-hungry. This fact has gen...

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Autores principales: Castro, Fernando, Chaver, Daniel, Piñuel, Luis, Prieto, Manuel, Tirado Fernández, Francisco
Formato: Articulo
Lenguaje:Inglés
Publicado: 2008
Materias:
LSQ
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/9636
http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Oct08-1.pdf
Aporte de:
id I19-R120-10915-9636
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ciencias Informáticas
Filtering
LSQ
memory disambiguation
energy-efficiency
spellingShingle Ciencias Informáticas
Filtering
LSQ
memory disambiguation
energy-efficiency
Castro, Fernando
Chaver, Daniel
Piñuel, Luis
Prieto, Manuel
Tirado Fernández, Francisco
Memory disambiguation hardware: a review
topic_facet Ciencias Informáticas
Filtering
LSQ
memory disambiguation
energy-efficiency
description One of the main challenges of modern processor designs is the implementation of scalable and efficient mechanisms to detect memory access order violations as a result of out-of-order execution. Conventional structures performing this task are complex, inefficient and power-hungry. This fact has generated a large body of work on optimizing address-based memory disambiguation logic, namely the load-store queue. In this paper we review the most significant proposals in this research field, focusing on our own contributions.
format Articulo
Articulo
author Castro, Fernando
Chaver, Daniel
Piñuel, Luis
Prieto, Manuel
Tirado Fernández, Francisco
author_facet Castro, Fernando
Chaver, Daniel
Piñuel, Luis
Prieto, Manuel
Tirado Fernández, Francisco
author_sort Castro, Fernando
title Memory disambiguation hardware: a review
title_short Memory disambiguation hardware: a review
title_full Memory disambiguation hardware: a review
title_fullStr Memory disambiguation hardware: a review
title_full_unstemmed Memory disambiguation hardware: a review
title_sort memory disambiguation hardware: a review
publishDate 2008
url http://sedici.unlp.edu.ar/handle/10915/9636
http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Oct08-1.pdf
work_keys_str_mv AT castrofernando memorydisambiguationhardwareareview
AT chaverdaniel memorydisambiguationhardwareareview
AT pinuelluis memorydisambiguationhardwareareview
AT prietomanuel memorydisambiguationhardwareareview
AT tiradofernandezfrancisco memorydisambiguationhardwareareview
bdutipo_str Repositorios
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