Intelligent systems engineering with reconfigurable computing
Intelligent computing systems comprising microprocessor cores, memory and reconfigurable user-programmable logic represent a promising technology which is well-suited for applications such as digital signal and image processing, cryptography and encryption, etc. These applications employ frequently...
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| Formato: | Objeto de conferencia |
| Lenguaje: | Inglés |
| Publicado: |
2006
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| Acceso en línea: | http://sedici.unlp.edu.ar/handle/10915/24204 |
| Aporte de: |
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I19-R120-10915-24204 |
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dspace |
| institution |
Universidad Nacional de La Plata |
| institution_str |
I-19 |
| repository_str |
R-120 |
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SEDICI (UNLP) |
| language |
Inglés |
| topic |
Ciencias Informáticas Intelligent computing systems (ICS) FPGA (field-programmable gate array) algorithm mapping |
| spellingShingle |
Ciencias Informáticas Intelligent computing systems (ICS) FPGA (field-programmable gate array) algorithm mapping Skliarova, Iouliia Intelligent systems engineering with reconfigurable computing |
| topic_facet |
Ciencias Informáticas Intelligent computing systems (ICS) FPGA (field-programmable gate array) algorithm mapping |
| description |
Intelligent computing systems comprising microprocessor cores, memory and reconfigurable user-programmable logic represent a promising technology which is well-suited for applications such as digital signal and image processing, cryptography and encryption, etc. These applications employ frequently recursive algorithms which are particularly appropriate when the underlying problem is defined in recursive terms and it is difficult to reformulate it as an iterative procedure. It is known, however, that hardware description languages (such as VHDL) as well as system-level specification languages (such as Handel-C) that are usually employed for specifying the required functionality of reconfigurable systems do not provide a direct support for recursion. In this paper a method allowing recursive algorithms to be easily described in Handel-C and implemented in an FPGA (field-programmable gate array) is proposed. The recursive search algorithm for the knapsack problem is considered as an example |
| format |
Objeto de conferencia Objeto de conferencia |
| author |
Skliarova, Iouliia |
| author_facet |
Skliarova, Iouliia |
| author_sort |
Skliarova, Iouliia |
| title |
Intelligent systems engineering with reconfigurable computing |
| title_short |
Intelligent systems engineering with reconfigurable computing |
| title_full |
Intelligent systems engineering with reconfigurable computing |
| title_fullStr |
Intelligent systems engineering with reconfigurable computing |
| title_full_unstemmed |
Intelligent systems engineering with reconfigurable computing |
| title_sort |
intelligent systems engineering with reconfigurable computing |
| publishDate |
2006 |
| url |
http://sedici.unlp.edu.ar/handle/10915/24204 |
| work_keys_str_mv |
AT skliarovaiouliia intelligentsystemsengineeringwithreconfigurablecomputing |
| bdutipo_str |
Repositorios |
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1764820466721095680 |