Design and implementation of a genetic algorithm with integer number coding for the evolution of FPGAs in space applications

In [1] a form of representation of logic circuits by chains of integer numbers is presented. That type of representation is easy to simulate and to export to FPGA hardware in such a way that, by adding a genetic algorithm (GA), it can be used in an evolutionary process. Because regular GAs utilize b...

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Autores principales: Quiroga, Juan, Paz, Francisco, Capossio, Juan Pablo
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2012
Materias:
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/23760
Aporte de:
id I19-R120-10915-23760
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ciencias Informáticas
Genetic Algorithms
Evolvable Hardware
FPGA
Fault Tolerance
sistema operativo
Algorithms
Architectures
spellingShingle Ciencias Informáticas
Genetic Algorithms
Evolvable Hardware
FPGA
Fault Tolerance
sistema operativo
Algorithms
Architectures
Quiroga, Juan
Paz, Francisco
Capossio, Juan Pablo
Design and implementation of a genetic algorithm with integer number coding for the evolution of FPGAs in space applications
topic_facet Ciencias Informáticas
Genetic Algorithms
Evolvable Hardware
FPGA
Fault Tolerance
sistema operativo
Algorithms
Architectures
description In [1] a form of representation of logic circuits by chains of integer numbers is presented. That type of representation is easy to simulate and to export to FPGA hardware in such a way that, by adding a genetic algorithm (GA), it can be used in an evolutionary process. Because regular GAs utilize binary number coding, one was designed, with all its operators and processes, that uses integer number coding. This evolvable hardware (EH) process was tested with more than 200 hours of runs to determine the effectiveness of the integer coded GA. Results show that, given the proper conditions, the GA is effective in finding solutions that fulfill the required needs of the target system and that this particular EH platform is suitable for applications where fault tolerance capability is required, such as space systems.
format Objeto de conferencia
Objeto de conferencia
author Quiroga, Juan
Paz, Francisco
Capossio, Juan Pablo
author_facet Quiroga, Juan
Paz, Francisco
Capossio, Juan Pablo
author_sort Quiroga, Juan
title Design and implementation of a genetic algorithm with integer number coding for the evolution of FPGAs in space applications
title_short Design and implementation of a genetic algorithm with integer number coding for the evolution of FPGAs in space applications
title_full Design and implementation of a genetic algorithm with integer number coding for the evolution of FPGAs in space applications
title_fullStr Design and implementation of a genetic algorithm with integer number coding for the evolution of FPGAs in space applications
title_full_unstemmed Design and implementation of a genetic algorithm with integer number coding for the evolution of FPGAs in space applications
title_sort design and implementation of a genetic algorithm with integer number coding for the evolution of fpgas in space applications
publishDate 2012
url http://sedici.unlp.edu.ar/handle/10915/23760
work_keys_str_mv AT quirogajuan designandimplementationofageneticalgorithmwithintegernumbercodingfortheevolutionoffpgasinspaceapplications
AT pazfrancisco designandimplementationofageneticalgorithmwithintegernumbercodingfortheevolutionoffpgasinspaceapplications
AT capossiojuanpablo designandimplementationofageneticalgorithmwithintegernumbercodingfortheevolutionoffpgasinspaceapplications
bdutipo_str Repositorios
_version_ 1764820466170593286