Designing a scalable simultaneous multithreaded processor

This paper analyzes the basic design issues of multithreaded processors and discusses how they may reach the performance requirements of current workloads, taking into account current technological trends. We compare the multithreaded proposal with current single-thread altematives like superscalar...

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Detalles Bibliográficos
Autores principales:	Moure, Juan Carlos, Rexachs del Rosario, Dolores, Luque Fadón, Emilio
Formato:	Objeto de conferencia
Lenguaje:	Inglés
Publicado:	2000
Materias:	Ciencias Informáticas simultaneous multithreaded processors fetch unit Parallel Architectures Threads
Acceso en línea:	http://sedici.unlp.edu.ar/handle/10915/23357
Aporte de:	SEDICI (UNLP) de Universidad Nacional de La Plata

id	I19-R120-10915-23357
record_format	dspace
institution	Universidad Nacional de La Plata
institution_str	I-19
repository_str	R-120
collection	SEDICI (UNLP)
language	Inglés
topic	Ciencias Informáticas simultaneous multithreaded processors fetch unit Parallel Architectures Threads
spellingShingle	Ciencias Informáticas simultaneous multithreaded processors fetch unit Parallel Architectures Threads Moure, Juan Carlos Rexachs del Rosario, Dolores Luque Fadón, Emilio Designing a scalable simultaneous multithreaded processor
topic_facet	Ciencias Informáticas simultaneous multithreaded processors fetch unit Parallel Architectures Threads
description	This paper analyzes the basic design issues of multithreaded processors and discusses how they may reach the performance requirements of current workloads, taking into account current technological trends. We compare the multithreaded proposal with current single-thread altematives like superscalar and EPIC. W e present scalable simultaneous multithreading, a new design approach that balances the exploitation of instruction- and thread-level parallelism, combining static and dynamic mechanisms to maximize overall performance. W e first discuss results from a preliminary study of its suitability and then address a more indepth analysis of the design of one of its parts, the fetch unit. Results from a comprehensive study of the interference of threads on the fetch unit's shared resources are used to propose a detailed fetch unit microarchitecture. Its balanced organization and its reconfiguration capability assure both maximum singlethread performance and optimized multithreaded execution.
format	Objeto de conferencia Objeto de conferencia
author	Moure, Juan Carlos Rexachs del Rosario, Dolores Luque Fadón, Emilio
author_facet	Moure, Juan Carlos Rexachs del Rosario, Dolores Luque Fadón, Emilio
author_sort	Moure, Juan Carlos
title	Designing a scalable simultaneous multithreaded processor
title_short	Designing a scalable simultaneous multithreaded processor
title_full	Designing a scalable simultaneous multithreaded processor
title_fullStr	Designing a scalable simultaneous multithreaded processor
title_full_unstemmed	Designing a scalable simultaneous multithreaded processor
title_sort	designing a scalable simultaneous multithreaded processor
publishDate	2000
url	http://sedici.unlp.edu.ar/handle/10915/23357
work_keys_str_mv	AT mourejuancarlos designingascalablesimultaneousmultithreadedprocessor AT rexachsdelrosariodolores designingascalablesimultaneousmultithreadedprocessor AT luquefadonemilio designingascalablesimultaneousmultithreadedprocessor
bdutipo_str	Repositorios
_version_	1764820465738579971

Designing a scalable simultaneous multithreaded processor

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