Selection of the optimum stage number in pipelined floating-point units

In this work the pipeline theory applied to computing systems is reviewed. The effects of the stage delay, overhead stage delay, equalization factor and number of stages on the pipeline system performance are analyzed. A pipeline design method to identify the optimum number of stages is proposed. Th...

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Autores principales: Balliriain, Eduardo, Falcón Faya, Martín Ignacio, Slavkin, Pablo, Lerendegui, Norberto M.
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2003
Materias:
Ciencias Informáticas
Optimum Stage Number
Pipelined Floating-Point Units
Architectures
sistema operativo
Optimization
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/22723
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata
id I19-R120-10915-22723
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ciencias Informáticas
Optimum Stage Number
Pipelined Floating-Point Units
Architectures
sistema operativo
Optimization
spellingShingle Ciencias Informáticas
Optimum Stage Number
Pipelined Floating-Point Units
Architectures
sistema operativo
Optimization
Balliriain, Eduardo
Falcón Faya, Martín Ignacio
Slavkin, Pablo
Lerendegui, Norberto M.
Selection of the optimum stage number in pipelined floating-point units
topic_facet Ciencias Informáticas
Optimum Stage Number
Pipelined Floating-Point Units
Architectures
sistema operativo
Optimization
description In this work the pipeline theory applied to computing systems is reviewed. The effects of the stage delay, overhead stage delay, equalization factor and number of stages on the pipeline system performance are analyzed. A pipeline design method to identify the optimum number of stages is proposed. This method makes use of a trade-off expression that considers speed factor and hardware cost. The procedure is applied to turn a sequential Floating Point Unit (FPU) into a Pipelined Floating Point Unit (PFPU) capable to achieve a performance 600% larger. The effect of the physical limits on the PFPU maximum performance is analyzed.
format Objeto de conferencia
Objeto de conferencia
author Balliriain, Eduardo
Falcón Faya, Martín Ignacio
Slavkin, Pablo
Lerendegui, Norberto M.
author_facet Balliriain, Eduardo
Falcón Faya, Martín Ignacio
Slavkin, Pablo
Lerendegui, Norberto M.
author_sort Balliriain, Eduardo
title Selection of the optimum stage number in pipelined floating-point units
title_short Selection of the optimum stage number in pipelined floating-point units
title_full Selection of the optimum stage number in pipelined floating-point units
title_fullStr Selection of the optimum stage number in pipelined floating-point units
title_full_unstemmed Selection of the optimum stage number in pipelined floating-point units
title_sort selection of the optimum stage number in pipelined floating-point units
publishDate 2003
url http://sedici.unlp.edu.ar/handle/10915/22723
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AT falconfayamartinignacio selectionoftheoptimumstagenumberinpipelinedfloatingpointunits
AT slavkinpablo selectionoftheoptimumstagenumberinpipelinedfloatingpointunits
AT lerendeguinorbertom selectionoftheoptimumstagenumberinpipelinedfloatingpointunits
bdutipo_str Repositorios
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