FIPBLOX: a graphical interactive design tool for FIPSOC

FIPSOC is a field programmable mixed-signal integrated device consisting of a Field Programmable Gate Array (FPGA), a set of programmable and interconnectable analog cells, and a microprocessor core which can run general purpose user programs, handle the dynamic reconfiguration of the programmable b...

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Detalles Bibliográficos
Autor principal: Simonelli, Daniel Horacio
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2003
Materias:
Ciencias Informáticas
sistema operativo
Architectures
graphical interactive
FIPBLOX
FIPSOC
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/22644
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata
id I19-R120-10915-22644
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ciencias Informáticas
sistema operativo
Architectures
graphical interactive
FIPBLOX
FIPSOC
spellingShingle Ciencias Informáticas
sistema operativo
Architectures
graphical interactive
FIPBLOX
FIPSOC
Simonelli, Daniel Horacio
FIPBLOX: a graphical interactive design tool for FIPSOC
topic_facet Ciencias Informáticas
sistema operativo
Architectures
graphical interactive
FIPBLOX
FIPSOC
description FIPSOC is a field programmable mixed-signal integrated device consisting of a Field Programmable Gate Array (FPGA), a set of programmable and interconnectable analog cells, and a microprocessor core which can run general purpose user programs, handle the dynamic reconfiguration of the programmable blocks and probe, in real time, internal digital and analog signals. This device is specially suitable for development and fast prototyping of mixed signal integrated applications. As FIPSOC project is currently under development, it has no yet any powerful tool for synthesis and a structural VHDL (components) approach is to be used for designing. Therefore, the user starts from simple design structures and through a bottom-up style must build more complex components. In this paper we present FIPBLOX, a tool that allows the user automatically generate VHDL code for implementing and customizing high-level modules using the basic resources provided by the FIPSOC FPGA.
format Objeto de conferencia
Objeto de conferencia
author Simonelli, Daniel Horacio
author_facet Simonelli, Daniel Horacio
author_sort Simonelli, Daniel Horacio
title FIPBLOX: a graphical interactive design tool for FIPSOC
title_short FIPBLOX: a graphical interactive design tool for FIPSOC
title_full FIPBLOX: a graphical interactive design tool for FIPSOC
title_fullStr FIPBLOX: a graphical interactive design tool for FIPSOC
title_full_unstemmed FIPBLOX: a graphical interactive design tool for FIPSOC
title_sort fipblox: a graphical interactive design tool for fipsoc
publishDate 2003
url http://sedici.unlp.edu.ar/handle/10915/22644
work_keys_str_mv AT simonellidanielhoracio fipbloxagraphicalinteractivedesigntoolforfipsoc
bdutipo_str Repositorios
_version_ 1764820466166398976

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