An improved convergence algorithm to compute ln(x) – FPGA implementations
This paper presents FPGA implementations of classical algorithms for computing ln(x) with some improvement at the level of the multiplication steps, and step skipping techniques. One starts from a practical implementation of ln(x) computation using a convergence method. The function is approximated...
| Autores principales: | , , |
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| Formato: | Objeto de conferencia |
| Lenguaje: | Inglés |
| Publicado: |
2007
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| Acceso en línea: | http://sedici.unlp.edu.ar/handle/10915/21591 |
| Aporte de: |
| id |
I19-R120-10915-21591 |
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| record_format |
dspace |
| institution |
Universidad Nacional de La Plata |
| institution_str |
I-19 |
| repository_str |
R-120 |
| collection |
SEDICI (UNLP) |
| language |
Inglés |
| topic |
Ciencias Informáticas Informática convergence method multiplicative normalization xilinx virtex IV Convergence Algorithms |
| spellingShingle |
Ciencias Informáticas Informática convergence method multiplicative normalization xilinx virtex IV Convergence Algorithms Bioul, Géry Jean Antoine Vázquez, Martín Osvaldo Acosta, Martín Oriol An improved convergence algorithm to compute ln(x) – FPGA implementations |
| topic_facet |
Ciencias Informáticas Informática convergence method multiplicative normalization xilinx virtex IV Convergence Algorithms |
| description |
This paper presents FPGA implementations of classical algorithms for computing ln(x) with some improvement at the level of the multiplication steps, and step skipping techniques. One starts from a practical implementation of ln(x) computation using a convergence method. The function is approximated by a multiplicative normalization technique, however, thanks to the peculiarity of the multiplicative factor, namely (1 + ai .2-i ), with ai ∈ {-1, 0, 1}, the successive multiplications have been replaced by additions. Doing so, one saves the use of LUT’s and eventually reduces processing time, as addition is generally faster than multiplication. Further, the acceleration technique, based on skipping trivial steps, improves performances. Implementations for FPGA are presented with time and slice cost evaluations. The Xilinx Virtex IV has been used for comparative analysis of 8 to 64-bit logarithm computing devices. |
| format |
Objeto de conferencia Objeto de conferencia |
| author |
Bioul, Géry Jean Antoine Vázquez, Martín Osvaldo Acosta, Martín Oriol |
| author_facet |
Bioul, Géry Jean Antoine Vázquez, Martín Osvaldo Acosta, Martín Oriol |
| author_sort |
Bioul, Géry Jean Antoine |
| title |
An improved convergence algorithm to compute ln(x) – FPGA implementations |
| title_short |
An improved convergence algorithm to compute ln(x) – FPGA implementations |
| title_full |
An improved convergence algorithm to compute ln(x) – FPGA implementations |
| title_fullStr |
An improved convergence algorithm to compute ln(x) – FPGA implementations |
| title_full_unstemmed |
An improved convergence algorithm to compute ln(x) – FPGA implementations |
| title_sort |
improved convergence algorithm to compute ln(x) – fpga implementations |
| publishDate |
2007 |
| url |
http://sedici.unlp.edu.ar/handle/10915/21591 |
| work_keys_str_mv |
AT bioulgeryjeanantoine animprovedconvergencealgorithmtocomputelnxfpgaimplementations AT vazquezmartinosvaldo animprovedconvergencealgorithmtocomputelnxfpgaimplementations AT acostamartinoriol animprovedconvergencealgorithmtocomputelnxfpgaimplementations AT bioulgeryjeanantoine improvedconvergencealgorithmtocomputelnxfpgaimplementations AT vazquezmartinosvaldo improvedconvergencealgorithmtocomputelnxfpgaimplementations AT acostamartinoriol improvedconvergencealgorithmtocomputelnxfpgaimplementations |
| bdutipo_str |
Repositorios |
| _version_ |
1764820464723558402 |