Step skipping acceleration techniques on recursive logical circuits : Practical implementations on FPGA

This paper presents step skipping acceleration techniques for a class of convergence algorithms computing arithmetic functions. In particular, an extension of the fast adder carry-skip procedure is carried out for special purpose cellular array circuits implementing iterative logical functions for w...

Descripción completa

Guardado en:
Detalles Bibliográficos
Autores principales: Vázquez, Martín Osvaldo, Bioul, Géry Jean Antoine
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2008
Materias:
Ciencias Informáticas
Convergence
Gate arrays
ln(x)
step skipping
carry-skip adder
Xilinx Virtex 4
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/21576
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata
id I19-R120-10915-21576
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ciencias Informáticas
Convergence
Gate arrays
ln(x)
step skipping
carry-skip adder
Xilinx Virtex 4
spellingShingle Ciencias Informáticas
Convergence
Gate arrays
ln(x)
step skipping
carry-skip adder
Xilinx Virtex 4
Vázquez, Martín Osvaldo
Bioul, Géry Jean Antoine
Step skipping acceleration techniques on recursive logical circuits : Practical implementations on FPGA
topic_facet Ciencias Informáticas
Convergence
Gate arrays
ln(x)
step skipping
carry-skip adder
Xilinx Virtex 4
description This paper presents step skipping acceleration techniques for a class of convergence algorithms computing arithmetic functions. In particular, an extension of the fast adder carry-skip procedure is carried out for special purpose cellular array circuits implementing iterative logical functions for which some propagating information may be fruitfully computed ahead of the current step output computation. This information is thus carried to the next stage, accelerating the overall calculation. An application is given for the 2´s complement sign changing circuit, then for the step-skipping acceleration circuits used in the implementation of the ln(x) convergence algorithm. FPGA implementations on Xilinx Virtex IV have been achieved with comparative analysis of 32- to 512-bit computing algorithms.
format Objeto de conferencia
Objeto de conferencia
author Vázquez, Martín Osvaldo
Bioul, Géry Jean Antoine
author_facet Vázquez, Martín Osvaldo
Bioul, Géry Jean Antoine
author_sort Vázquez, Martín Osvaldo
title Step skipping acceleration techniques on recursive logical circuits : Practical implementations on FPGA
title_short Step skipping acceleration techniques on recursive logical circuits : Practical implementations on FPGA
title_full Step skipping acceleration techniques on recursive logical circuits : Practical implementations on FPGA
title_fullStr Step skipping acceleration techniques on recursive logical circuits : Practical implementations on FPGA
title_full_unstemmed Step skipping acceleration techniques on recursive logical circuits : Practical implementations on FPGA
title_sort step skipping acceleration techniques on recursive logical circuits : practical implementations on fpga
publishDate 2008
url http://sedici.unlp.edu.ar/handle/10915/21576
work_keys_str_mv AT vazquezmartinosvaldo stepskippingaccelerationtechniquesonrecursivelogicalcircuitspracticalimplementationsonfpga
AT bioulgeryjeanantoine stepskippingaccelerationtechniquesonrecursivelogicalcircuitspracticalimplementationsonfpga
bdutipo_str Repositorios
_version_ 1764820464700489728

Ejemplares similares