Leveraging index compression techniques to optimize the use of co-processors

The significant presence that many-core devices like GPUs have these days, and their enormous computational power, motivates the study of sparse matrix operations in this hardware. The essential sparse kernels in scientific computing, such as the sparse matrix-vector multiplication (SpMV), usually h...

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Autores principales: Freire, Manuel, Manchal, Raúl, Martinez, Agustin, Padrón, Daniel, Dufrechou, Ernesto, Ezzatti, Pablo
Formato: Articulo
Lenguaje:Inglés
Publicado: 2024
Materias:
Ciencias Informáticas
blocked formats
matrix storage reduction
memory access
reordering techniques
sparse matrices
acceso a memoria
formatos a bloques
reducción de almacenamiento de matrices
matrices dispersas
técnicas de reordenamiento
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/166754
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SEDICI (UNLP) de Universidad Nacional de La Plata
id I19-R120-10915-166754
record_format dspace
spelling I19-R120-10915-1667542024-06-05T20:04:44Z http://sedici.unlp.edu.ar/handle/10915/166754 Leveraging index compression techniques to optimize the use of co-processors Aprovechamiento de las técnicas de compresión de índices para optimizar el uso de coprocesadores Freire, Manuel Manchal, Raúl Martinez, Agustin Padrón, Daniel Dufrechou, Ernesto Ezzatti, Pablo 2024-04 2024-06-05T12:59:26Z en Ciencias Informáticas blocked formats matrix storage reduction memory access reordering techniques sparse matrices acceso a memoria formatos a bloques reducción de almacenamiento de matrices matrices dispersas técnicas de reordenamiento The significant presence that many-core devices like GPUs have these days, and their enormous computational power, motivates the study of sparse matrix operations in this hardware. The essential sparse kernels in scientific computing, such as the sparse matrix-vector multiplication (SpMV), usually have many different high-performance GPU implementations. Sparse matrix problems typically imply memory-bound operations, and this characteristic is particularly limiting in massively parallel processors. This work revisits the main ideas about reducing the volume of data required by sparse storage formats and advances in understanding some compression techniques. In particular, we study the use of index compression combined with sparse matrix reordering techniques in CSR and explore other approaches using a blocked format. The systematic experimental evaluation on a large set of real-world matrices confirms that this approach achieves meaningful data storage reductions. Additionally, we find promising results of the impact of the storage reduction on the execution time when using accelerators to perform the mathematical kernels. La importante presencia que tienen hoy en día los dispositivos multinúcleos como las GPU, y su enorme poder computacional, motivan el estudio de las operaciones matriciales dispersas en dicho hardware. Las rutinas matemáticas esenciales para la computación científica en álgebra dispersa, como la multiplicación matriz dispera vector (SpMV), suelen tener muchas implementaciones de alto rendimiento diferentes en GPUs. Los problemas de matrices dispersas normalmente ünplican operaciones acotadas por la memoria, y esta característica es particularmente limitante en procesadores masivamente paralelos. Este trabajo revisa las ideas principales sobre cómo reducir el volumen de datos requerido por los formatos de almacenamiento dispersos y avanza en la comprensión de algunas técnicas de compresión. En particular, estudiamos el uso de compresión de índices combinada con técnicas de reordenamiento de matrices dispersas en CSR y exploramos otros enfoques utilizando un formato a bloques. La evaluación experimental sistemática en un gran conjunto de matrices del mundo real confirma que este enfoque logra reducciones significativas en el almacenamiento de datos. Además, encontramos resultados prometedores del impacto de la reducción del almacenamiento en el tiempo de ejecución cuando se utilizan aceleradores para realizar las operaciones matemáticas. Facultad de Informática Articulo Articulo http://creativecommons.org/licenses/by-nc-sa/4.0/ Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0) application/pdf 1-13
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ciencias Informáticas
blocked formats
matrix storage reduction
memory access
reordering techniques
sparse matrices
acceso a memoria
formatos a bloques
reducción de almacenamiento de matrices
matrices dispersas
técnicas de reordenamiento
spellingShingle Ciencias Informáticas
blocked formats
matrix storage reduction
memory access
reordering techniques
sparse matrices
acceso a memoria
formatos a bloques
reducción de almacenamiento de matrices
matrices dispersas
técnicas de reordenamiento
Freire, Manuel
Manchal, Raúl
Martinez, Agustin
Padrón, Daniel
Dufrechou, Ernesto
Ezzatti, Pablo
Leveraging index compression techniques to optimize the use of co-processors
topic_facet Ciencias Informáticas
blocked formats
matrix storage reduction
memory access
reordering techniques
sparse matrices
acceso a memoria
formatos a bloques
reducción de almacenamiento de matrices
matrices dispersas
técnicas de reordenamiento
description The significant presence that many-core devices like GPUs have these days, and their enormous computational power, motivates the study of sparse matrix operations in this hardware. The essential sparse kernels in scientific computing, such as the sparse matrix-vector multiplication (SpMV), usually have many different high-performance GPU implementations. Sparse matrix problems typically imply memory-bound operations, and this characteristic is particularly limiting in massively parallel processors. This work revisits the main ideas about reducing the volume of data required by sparse storage formats and advances in understanding some compression techniques. In particular, we study the use of index compression combined with sparse matrix reordering techniques in CSR and explore other approaches using a blocked format. The systematic experimental evaluation on a large set of real-world matrices confirms that this approach achieves meaningful data storage reductions. Additionally, we find promising results of the impact of the storage reduction on the execution time when using accelerators to perform the mathematical kernels.
format Articulo
Articulo
author Freire, Manuel
Manchal, Raúl
Martinez, Agustin
Padrón, Daniel
Dufrechou, Ernesto
Ezzatti, Pablo
author_facet Freire, Manuel
Manchal, Raúl
Martinez, Agustin
Padrón, Daniel
Dufrechou, Ernesto
Ezzatti, Pablo
author_sort Freire, Manuel
title Leveraging index compression techniques to optimize the use of co-processors
title_short Leveraging index compression techniques to optimize the use of co-processors
title_full Leveraging index compression techniques to optimize the use of co-processors
title_fullStr Leveraging index compression techniques to optimize the use of co-processors
title_full_unstemmed Leveraging index compression techniques to optimize the use of co-processors
title_sort leveraging index compression techniques to optimize the use of co-processors
publishDate 2024
url http://sedici.unlp.edu.ar/handle/10915/166754
work_keys_str_mv AT freiremanuel leveragingindexcompressiontechniquestooptimizetheuseofcoprocessors
AT manchalraul leveragingindexcompressiontechniquestooptimizetheuseofcoprocessors
AT martinezagustin leveragingindexcompressiontechniquestooptimizetheuseofcoprocessors
AT padrondaniel leveragingindexcompressiontechniquestooptimizetheuseofcoprocessors
AT dufrechouernesto leveragingindexcompressiontechniquestooptimizetheuseofcoprocessors
AT ezzattipablo leveragingindexcompressiontechniquestooptimizetheuseofcoprocessors
AT freiremanuel aprovechamientodelastecnicasdecompresiondeindicesparaoptimizarelusodecoprocesadores
AT manchalraul aprovechamientodelastecnicasdecompresiondeindicesparaoptimizarelusodecoprocesadores
AT martinezagustin aprovechamientodelastecnicasdecompresiondeindicesparaoptimizarelusodecoprocesadores
AT padrondaniel aprovechamientodelastecnicasdecompresiondeindicesparaoptimizarelusodecoprocesadores
AT dufrechouernesto aprovechamientodelastecnicasdecompresiondeindicesparaoptimizarelusodecoprocesadores
AT ezzattipablo aprovechamientodelastecnicasdecompresiondeindicesparaoptimizarelusodecoprocesadores
_version_ 1807223369189294080

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