Open-source SoC-FPGA Platform for Signal Processing

Systems known as SoC-FPGAs have experienced a growing popularity in recent years. This devices integrate field programmable gate arrays with elements such as microprocessors, PLLs and embedded memory blocks. The advantages of this type of systems are clear: great reconfigurability, performance, and...

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Autores principales: Oliva, Matías Javier, García, Pablo Andrés, Spinelli, Enrique Mario, Veiga, Alejandro Luis
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2023
Materias:
Ingeniería
SoC-FPGA
Signal Processing
Open source
Filtering
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/160854
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata
id I19-R120-10915-160854
record_format dspace
spelling I19-R120-10915-1608542023-11-30T04:07:17Z http://sedici.unlp.edu.ar/handle/10915/160854 Open-source SoC-FPGA Platform for Signal Processing Oliva, Matías Javier García, Pablo Andrés Spinelli, Enrique Mario Veiga, Alejandro Luis 2023-03 2023 2023-11-29T13:49:55Z en Ingeniería SoC-FPGA Signal Processing Open source Filtering Systems known as SoC-FPGAs have experienced a growing popularity in recent years. This devices integrate field programmable gate arrays with elements such as microprocessors, PLLs and embedded memory blocks. The advantages of this type of systems are clear: great reconfigurability, performance, and energy efficiency, but they come with an negative side: programming and optimizing the applications that use them remains a long and complicated process. In particular, realtime signal processing at high frequencies is an application that can clearly benefit from the advantages of SoC-FPGAs, but the complex workflow assosiated with them usually prevents the designers from taking advantage of its capabilities. In this work, an open source SoC-FPGA platform, specifically intended for signal processing is presented, with the aim of alleviating this workflow. The platform structure is described, specifying the places where the designer may implement their algorithms, and then its operation is demonstrated by acquiring a signal at a maximum sampling frequency of 65 MHz and passing it through a 32th order FIR filter, verifying that the it meets it’s expected theoretical response. The whole system can operate at a maximum frequency of 85 Mhz, has a latency of 16 clock cycles, and uses less than half of the resources of a Cyclone V device. Instituto de Investigaciones en Electrónica, Control y Procesamiento de Señales Objeto de conferencia Objeto de conferencia http://creativecommons.org/licenses/by-nc-nd/4.0/ Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International (CC BY-NC-ND 4.0) application/pdf
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ingeniería
SoC-FPGA
Signal Processing
Open source
Filtering
spellingShingle Ingeniería
SoC-FPGA
Signal Processing
Open source
Filtering
Oliva, Matías Javier
García, Pablo Andrés
Spinelli, Enrique Mario
Veiga, Alejandro Luis
Open-source SoC-FPGA Platform for Signal Processing
topic_facet Ingeniería
SoC-FPGA
Signal Processing
Open source
Filtering
description Systems known as SoC-FPGAs have experienced a growing popularity in recent years. This devices integrate field programmable gate arrays with elements such as microprocessors, PLLs and embedded memory blocks. The advantages of this type of systems are clear: great reconfigurability, performance, and energy efficiency, but they come with an negative side: programming and optimizing the applications that use them remains a long and complicated process. In particular, realtime signal processing at high frequencies is an application that can clearly benefit from the advantages of SoC-FPGAs, but the complex workflow assosiated with them usually prevents the designers from taking advantage of its capabilities. In this work, an open source SoC-FPGA platform, specifically intended for signal processing is presented, with the aim of alleviating this workflow. The platform structure is described, specifying the places where the designer may implement their algorithms, and then its operation is demonstrated by acquiring a signal at a maximum sampling frequency of 65 MHz and passing it through a 32th order FIR filter, verifying that the it meets it’s expected theoretical response. The whole system can operate at a maximum frequency of 85 Mhz, has a latency of 16 clock cycles, and uses less than half of the resources of a Cyclone V device.
format Objeto de conferencia
Objeto de conferencia
author Oliva, Matías Javier
García, Pablo Andrés
Spinelli, Enrique Mario
Veiga, Alejandro Luis
author_facet Oliva, Matías Javier
García, Pablo Andrés
Spinelli, Enrique Mario
Veiga, Alejandro Luis
author_sort Oliva, Matías Javier
title Open-source SoC-FPGA Platform for Signal Processing
title_short Open-source SoC-FPGA Platform for Signal Processing
title_full Open-source SoC-FPGA Platform for Signal Processing
title_fullStr Open-source SoC-FPGA Platform for Signal Processing
title_full_unstemmed Open-source SoC-FPGA Platform for Signal Processing
title_sort open-source soc-fpga platform for signal processing
publishDate 2023
url http://sedici.unlp.edu.ar/handle/10915/160854
work_keys_str_mv AT olivamatiasjavier opensourcesocfpgaplatformforsignalprocessing
AT garciapabloandres opensourcesocfpgaplatformforsignalprocessing
AT spinellienriquemario opensourcesocfpgaplatformforsignalprocessing
AT veigaalejandroluis opensourcesocfpgaplatformforsignalprocessing
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