Real-time SSVEP measurements through Lock-in detection in FPGA-based platform

In this work, a method for measuring steady-state visually evoked potentials using the Lock-In technique is presented. The proposed method in- volves acquiring the electroencephalography signal through channel averaging from an ADS1299 sigma-delta converter, without the need for additional hardware...

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Detalles Bibliográficos
Autores principales: Oliva, Matías Javier, Guerrero, Federico Nicolás, García, Pablo Andrés, Spinelli, Enrique Mario
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2023
Materias:
EEG
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/160849
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Sumario:In this work, a method for measuring steady-state visually evoked potentials using the Lock-In technique is presented. The proposed method in- volves acquiring the electroencephalography signal through channel averaging from an ADS1299 sigma-delta converter, without the need for additional hardware to accommodate the signal and processing in real-time using an Intel MAX10 FPGA, while visual stimuli synchronized with the sampling and pro- cessing are generated. The result is a robust platform that allows determining a user's attention focus on visual stimuli flickering at 14.70, 16.67, and 19.23 Hz. The initial experimental tests of the system with three subjects validated the platform, obtaining an average signal-to-noise ratio of 3.2 in the detection, with a maximum of 6.2 in the case of an experienced SSVEP user.