Exploring the Throughput-Fairness Trade-off on Asymmetric Multicore Systems

Symmetric-ISA (instruction set architecture) asymmetric-performance multicore processors (AMPs) were shown to deliver higher performance per watt and area than symmetric CMPs (Chip Multi-Processors). Previous work has shown that this potential of AMP systems can be realizable thanks to the OS schedu...

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Autores principales: Saez, Juan Carlos, Pousa, Adrián, Castro, Fernando, Chaver, Daniel, Prieto-Matias, Manuel
Formato: Objeto de conferencia
Lenguaje:Español
Publicado: 2014
Materias:
Informática
asymmetric multicore
Scheduling
Operating systems
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/132853
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata
id I19-R120-10915-132853
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Español
topic Informática
asymmetric multicore
Scheduling
Operating systems
spellingShingle Informática
asymmetric multicore
Scheduling
Operating systems
Saez, Juan Carlos
Pousa, Adrián
Castro, Fernando
Chaver, Daniel
Prieto-Matias, Manuel
Exploring the Throughput-Fairness Trade-off on Asymmetric Multicore Systems
topic_facet Informática
asymmetric multicore
Scheduling
Operating systems
description Symmetric-ISA (instruction set architecture) asymmetric-performance multicore processors (AMPs) were shown to deliver higher performance per watt and area than symmetric CMPs (Chip Multi-Processors). Previous work has shown that this potential of AMP systems can be realizable thanks to the OS scheduler. Existing scheduling schemes that deliver fairness and priority enforcement on AMPs do not cater to the fact that applications in a multiprogram workload may derive different benefit from using fast cores in the system. As a result, they are likely to perform thread-to-core mappings that degrade the system throughput. To address this limitation, we propose Prop-SP, a scheduling algorithm that aims to improve the throughput-fairness trade-off on AMPs. Our evaluation on real hardware, and using scheduler implementations on a general-purpose OS, reveals that Prop-SP delivers a better throughput-fairness trade-off than state-of-the-art schedulers for a wide variety of multi-application workloads.
format Objeto de conferencia
Objeto de conferencia
author Saez, Juan Carlos
Pousa, Adrián
Castro, Fernando
Chaver, Daniel
Prieto-Matias, Manuel
author_facet Saez, Juan Carlos
Pousa, Adrián
Castro, Fernando
Chaver, Daniel
Prieto-Matias, Manuel
author_sort Saez, Juan Carlos
title Exploring the Throughput-Fairness Trade-off on Asymmetric Multicore Systems
title_short Exploring the Throughput-Fairness Trade-off on Asymmetric Multicore Systems
title_full Exploring the Throughput-Fairness Trade-off on Asymmetric Multicore Systems
title_fullStr Exploring the Throughput-Fairness Trade-off on Asymmetric Multicore Systems
title_full_unstemmed Exploring the Throughput-Fairness Trade-off on Asymmetric Multicore Systems
title_sort exploring the throughput-fairness trade-off on asymmetric multicore systems
publishDate 2014
url http://sedici.unlp.edu.ar/handle/10915/132853
work_keys_str_mv AT saezjuancarlos exploringthethroughputfairnesstradeoffonasymmetricmulticoresystems
AT pousaadrian exploringthethroughputfairnesstradeoffonasymmetricmulticoresystems
AT castrofernando exploringthethroughputfairnesstradeoffonasymmetricmulticoresystems
AT chaverdaniel exploringthethroughputfairnesstradeoffonasymmetricmulticoresystems
AT prietomatiasmanuel exploringthethroughputfairnesstradeoffonasymmetricmulticoresystems
bdutipo_str Repositorios
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