Energy-Efficient Algebra Kernels in FPGA for High Performance Computing
The dissemination of multi-core architectures and the later irruption of massively parallel devices, led to a revolution in High-Performance Computing (HPC) platforms in the last decades. As a result, Field- Programmable Gate Arrays (FPGAs) are re-emerging as a versatile and more energy-efficient al...
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| Formato: | Articulo |
| Lenguaje: | Inglés |
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2021
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| Acceso en línea: | http://sedici.unlp.edu.ar/handle/10915/128258 |
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I19-R120-10915-128258 |
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dspace |
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Universidad Nacional de La Plata |
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I-19 |
| repository_str |
R-120 |
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SEDICI (UNLP) |
| language |
Inglés |
| topic |
Ciencias Informáticas Dense and sparse NLA FPGA HLS Energy consumption Algebra densa y dispersa Consumo de energía |
| spellingShingle |
Ciencias Informáticas Dense and sparse NLA FPGA HLS Energy consumption Algebra densa y dispersa Consumo de energía Favaro, Federico Dufrechou, Ernesto Ezzatti, Pablo Oliver, Juan P. Energy-Efficient Algebra Kernels in FPGA for High Performance Computing |
| topic_facet |
Ciencias Informáticas Dense and sparse NLA FPGA HLS Energy consumption Algebra densa y dispersa Consumo de energía |
| description |
The dissemination of multi-core architectures and the later irruption of massively parallel devices, led to a revolution in High-Performance Computing (HPC) platforms in the last decades. As a result, Field- Programmable Gate Arrays (FPGAs) are re-emerging as a versatile and more energy-efficient alternative to other platforms. Traditional FPGA design implies using low-level Hardware Description Languages (HDL) such as VHDL or Verilog, which follow an entirely different programming model than standard software languages, and their use requires specialized knowledge of the underlying hardware. In the last years, manufacturers started to make big efforts to provide High-Level Synthesis (HLS) tools, in order to allow a grater adoption of FPGAs in the HPC coimnunity.
Our work studies the use of multi-core hardware and different FPGAs to address Numerical Linear Algebra (NLA) kernels such as the general matrix multiplication (GEMM) and the sparse matrix-vector multiplication (SpMV). Specifically, we compare the behavior of fine-tuned kernels in a multi-core CPU processor and HLS implementations on FPGAs. We perform the experimental evaluation of our implementations on a low-end and a cutting-edge FPGA platform, in terms of runtime and energy consumption, and compare the results against the Intel MKL library in CPU. |
| format |
Articulo Articulo |
| author |
Favaro, Federico Dufrechou, Ernesto Ezzatti, Pablo Oliver, Juan P. |
| author_facet |
Favaro, Federico Dufrechou, Ernesto Ezzatti, Pablo Oliver, Juan P. |
| author_sort |
Favaro, Federico |
| title |
Energy-Efficient Algebra Kernels in FPGA for High Performance Computing |
| title_short |
Energy-Efficient Algebra Kernels in FPGA for High Performance Computing |
| title_full |
Energy-Efficient Algebra Kernels in FPGA for High Performance Computing |
| title_fullStr |
Energy-Efficient Algebra Kernels in FPGA for High Performance Computing |
| title_full_unstemmed |
Energy-Efficient Algebra Kernels in FPGA for High Performance Computing |
| title_sort |
energy-efficient algebra kernels in fpga for high performance computing |
| publishDate |
2021 |
| url |
http://sedici.unlp.edu.ar/handle/10915/128258 |
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Repositorios |
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