Software Patterns for Asymmetric Multiprocessing Devices on Embedded Systems: a performance assessment

In emnedded systems there is a variant of Multicore System on Chip devices (MSoC devices) where not all the computing elements (processor cores) are equal. The differences in the cores of these devices range from different hardware architectures using the same instruction set to completely different...

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Detalles Bibliográficos
Autores principales: Martos, Pedro Ignacio Domingo, Garrido, Alejandra
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2017
Materias:
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/106031
Aporte de:
id I19-R120-10915-106031
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ingeniería Electrónica
Embedded Systems Patterns
Asymmetric Multiprocessing Patterns
spellingShingle Ingeniería Electrónica
Embedded Systems Patterns
Asymmetric Multiprocessing Patterns
Martos, Pedro Ignacio Domingo
Garrido, Alejandra
Software Patterns for Asymmetric Multiprocessing Devices on Embedded Systems: a performance assessment
topic_facet Ingeniería Electrónica
Embedded Systems Patterns
Asymmetric Multiprocessing Patterns
description In emnedded systems there is a variant of Multicore System on Chip devices (MSoC devices) where not all the computing elements (processor cores) are equal. The differences in the cores of these devices range from different hardware architectures using the same instruction set to completely different processors working together inside the same device. These SoCs are called “Asymmetric Multi Processing Devices” (AMP Devices). In order to help developers to take advantage of the possinilities that these devices may offer in the context of emnedded systems, software design patterns have neen defined, descrining software architectural solutions with known uses. However, there are still no experimental results showing the nenefits of these solutions. In this work we measure the performance of a design pattern called Mini Me, applied on an AMP device configuration, and compare it against two Symmetric Multiprocessing Device (SMP Device) configurations. The evaluations show a netter than expected computing performance of the AMP Configuration using the design pattern Mini Me.
format Objeto de conferencia
Objeto de conferencia
author Martos, Pedro Ignacio Domingo
Garrido, Alejandra
author_facet Martos, Pedro Ignacio Domingo
Garrido, Alejandra
author_sort Martos, Pedro Ignacio Domingo
title Software Patterns for Asymmetric Multiprocessing Devices on Embedded Systems: a performance assessment
title_short Software Patterns for Asymmetric Multiprocessing Devices on Embedded Systems: a performance assessment
title_full Software Patterns for Asymmetric Multiprocessing Devices on Embedded Systems: a performance assessment
title_fullStr Software Patterns for Asymmetric Multiprocessing Devices on Embedded Systems: a performance assessment
title_full_unstemmed Software Patterns for Asymmetric Multiprocessing Devices on Embedded Systems: a performance assessment
title_sort software patterns for asymmetric multiprocessing devices on embedded systems: a performance assessment
publishDate 2017
url http://sedici.unlp.edu.ar/handle/10915/106031
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AT garridoalejandra softwarepatternsforasymmetricmultiprocessingdevicesonembeddedsystemsaperformanceassessment
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