A 6-bit 2GS/s CMOS Time-Interleaved ADC for Analysis of Mixed-Signal Calibration Techniques

A 6-bit 2-GS/s time interleaved (TI) successive approximation register (SAR) analog-to-digital converter (ADC) is designed and fabricated in a 0.13 μm CMOS process. The architecture uses 8 time-interleaved track-and-hold amplifiers (THA), and 16 SARADC’s. Thechipincludes (i) a programmable delay cel...

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Autores principales: Reyes, Benjamín, Tealdi, Lucas, Paulina, German, Labat, Emanuel, Sánchez, Raúl, Mandolesi, Pablo, Hueda, Mario
Formato: conferenceObject
Lenguaje:Inglés
Publicado: 2022
Materias:
TI
ADC
SAR
CMOS
Acceso en línea:http://hdl.handle.net/11086/22937
Aporte de:
Repositorio Digital Universitario (UNC) de Universidad Nacional de Córdoba
id I10-R14111086-22937
record_format dspace
institution Universidad Nacional de Córdoba
institution_str I-10
repository_str R-141
collection Repositorio Digital Universitario (UNC)
language Inglés
topic TI
ADC
SAR
CMOS
spellingShingle TI
ADC
SAR
CMOS
Reyes, Benjamín
Tealdi, Lucas
Paulina, German
Labat, Emanuel
Sánchez, Raúl
Mandolesi, Pablo
Hueda, Mario
A 6-bit 2GS/s CMOS Time-Interleaved ADC for Analysis of Mixed-Signal Calibration Techniques
topic_facet TI
ADC
SAR
CMOS
description A 6-bit 2-GS/s time interleaved (TI) successive approximation register (SAR) analog-to-digital converter (ADC) is designed and fabricated in a 0.13 μm CMOS process. The architecture uses 8 time-interleaved track-and-hold amplifiers (THA), and 16 SARADC’s. Thechipincludes (i) a programmable delay cell array to adjust the interleaved sampling phase, and (ii) a 12 Gbps low voltage differential signaling (LVDS) interface. These blocks make the fabricated ADC an excellent platform to evaluate mixed-signal calibration techniques, which are of great interest for application in high-speed optical systems. Measurements of the fabricated ADC show 33.9 dB of peak signal-to-noise-and-distortion ratio (SNDR) and 192 mW of power consumption at 1.2 V
format conferenceObject
author Reyes, Benjamín
Tealdi, Lucas
Paulina, German
Labat, Emanuel
Sánchez, Raúl
Mandolesi, Pablo
Hueda, Mario
author_facet Reyes, Benjamín
Tealdi, Lucas
Paulina, German
Labat, Emanuel
Sánchez, Raúl
Mandolesi, Pablo
Hueda, Mario
author_sort Reyes, Benjamín
title A 6-bit 2GS/s CMOS Time-Interleaved ADC for Analysis of Mixed-Signal Calibration Techniques
title_short A 6-bit 2GS/s CMOS Time-Interleaved ADC for Analysis of Mixed-Signal Calibration Techniques
title_full A 6-bit 2GS/s CMOS Time-Interleaved ADC for Analysis of Mixed-Signal Calibration Techniques
title_fullStr A 6-bit 2GS/s CMOS Time-Interleaved ADC for Analysis of Mixed-Signal Calibration Techniques
title_full_unstemmed A 6-bit 2GS/s CMOS Time-Interleaved ADC for Analysis of Mixed-Signal Calibration Techniques
title_sort 6-bit 2gs/s cmos time-interleaved adc for analysis of mixed-signal calibration techniques
publishDate 2022
url http://hdl.handle.net/11086/22937
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