System Level ESD Protection
This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. Th...
Guardado en:
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| Otros Autores: | |
| Formato: | Libro electrónico |
| Lenguaje: | Inglés |
| Publicado: |
Cham :
Springer International Publishing : Imprint: Springer,
2014.
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| Materias: | |
| Acceso en línea: | http://dx.doi.org/10.1007/978-3-319-03221-4 |
| Aporte de: | Registro referencial: Solicitar el recurso aquí |
Tabla de Contenidos:
- System 1 Level ESD design
- System Level Test Methods
- On-Chip System Level ESD Devices and Clamps
- Latch-up at System-Level Stress
- IC and Systemn ESD Co-Design.