A 9.6 kb/s CMOS FSK modem for data transmission through power lines

The design and test of a mixed-signal 9.6Kb/s FSK transmitterreceiver is presented. It is aimed for digital communications through the domiciliary power lines as needed by a networked electrical power management and measuring system wherein the circuit must be embedded. For the desired baud rate the...

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Autores principales: Lancioni, Walter José, Petrashin, Pablo Antonio, Toledo, Luis Eduardo, Dualibe, Fortunato Carlos Augusto
Formato: Artículo
Lenguaje:Español
Publicado: 2007
Materias:
TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General)
Acceso en línea:http://pa.bibdigital.ucc.edu.ar/4012/1/A_Lancioni_Petrashin_Toledo_Dualibe.pdf
Aporte de:
Producción Académica Universidad Católica de Córdoba (UCCor) de Universidad Católica de Córdoba
id I38-R144-4012
record_format dspace
spelling I38-R144-40122025-09-18T13:56:57Z http://pa.bibdigital.ucc.edu.ar/4012/ A 9.6 kb/s CMOS FSK modem for data transmission through power lines Lancioni, Walter José Petrashin, Pablo Antonio Toledo, Luis Eduardo Dualibe, Fortunato Carlos Augusto TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General) The design and test of a mixed-signal 9.6Kb/s FSK transmitterreceiver is presented. It is aimed for digital communications through the domiciliary power lines as needed by a networked electrical power management and measuring system wherein the circuit must be embedded. For the desired baud rate the bit carriers frequencies of 111KHz (logical 0) and 125KHz (logical 1) were found optimal. The receiver amplifies and demodulates the incoming bit stream following a frequency-domain discrimination strategy based on switched capacitor (SC) filtering. The transmitter, pure digital, generates the carriers tones and builds the outgoing bit stream based on a frequency division technique by means of digital counters driven by a 6 MHz master clock. This can be either externally or internally generated and, as a byproduct, it is also used to handle the switches of the SC filters in the receiver. The circuit was fabricated in a standard 1.6um CMOS technology. For a ±2.5V rail-to-rail power supply the die area results in 5.76 mm2 whereas the current consumption is kept below 12mA. The modem was successfully tested within its own working environment. Main advantages with respect to its previously implemented discrete version by the OEM[1] reside in the extremely reduced number of external components required and the needlessness of a-posteriori filter tuning. 2007-12-31 info:eu-repo/semantics/article info:eu-repo/semantics/closedAccess application/pdf spa http://pa.bibdigital.ucc.edu.ar/4012/1/A_Lancioni_Petrashin_Toledo_Dualibe.pdf Lancioni, Walter José, Petrashin, Pablo Antonio ORCID: https://orcid.org/0000-0003-2607-6196 <https://orcid.org/0000-0003-2607-6196>, Toledo, Luis Eduardo and Dualibe, Fortunato Carlos Augusto ORCID: https://orcid.org/0000-0002-2889-315X <https://orcid.org/0000-0002-2889-315X> (2007) A 9.6 kb/s CMOS FSK modem for data transmission through power lines. In: Proceedings - SBCCI 2007: 20th Symposium on Integrated Circuits and System Design. info:eu-repo/semantics/altIdentifier/doi/10.1145/1284480.1284517
institution Universidad Católica de Córdoba
institution_str I-38
repository_str R-144
collection Producción Académica Universidad Católica de Córdoba (UCCor)
language Español
orig_language_str_mv spa
topic TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General)
spellingShingle TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General)
Lancioni, Walter José
Petrashin, Pablo Antonio
Toledo, Luis Eduardo
Dualibe, Fortunato Carlos Augusto
A 9.6 kb/s CMOS FSK modem for data transmission through power lines
topic_facet TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General)
description The design and test of a mixed-signal 9.6Kb/s FSK transmitterreceiver is presented. It is aimed for digital communications through the domiciliary power lines as needed by a networked electrical power management and measuring system wherein the circuit must be embedded. For the desired baud rate the bit carriers frequencies of 111KHz (logical 0) and 125KHz (logical 1) were found optimal. The receiver amplifies and demodulates the incoming bit stream following a frequency-domain discrimination strategy based on switched capacitor (SC) filtering. The transmitter, pure digital, generates the carriers tones and builds the outgoing bit stream based on a frequency division technique by means of digital counters driven by a 6 MHz master clock. This can be either externally or internally generated and, as a byproduct, it is also used to handle the switches of the SC filters in the receiver. The circuit was fabricated in a standard 1.6um CMOS technology. For a ±2.5V rail-to-rail power supply the die area results in 5.76 mm2 whereas the current consumption is kept below 12mA. The modem was successfully tested within its own working environment. Main advantages with respect to its previously implemented discrete version by the OEM[1] reside in the extremely reduced number of external components required and the needlessness of a-posteriori filter tuning.
format Artículo
author Lancioni, Walter José
Petrashin, Pablo Antonio
Toledo, Luis Eduardo
Dualibe, Fortunato Carlos Augusto
author_facet Lancioni, Walter José
Petrashin, Pablo Antonio
Toledo, Luis Eduardo
Dualibe, Fortunato Carlos Augusto
author_sort Lancioni, Walter José
title A 9.6 kb/s CMOS FSK modem for data transmission through power lines
title_short A 9.6 kb/s CMOS FSK modem for data transmission through power lines
title_full A 9.6 kb/s CMOS FSK modem for data transmission through power lines
title_fullStr A 9.6 kb/s CMOS FSK modem for data transmission through power lines
title_full_unstemmed A 9.6 kb/s CMOS FSK modem for data transmission through power lines
title_sort 9.6 kb/s cmos fsk modem for data transmission through power lines
publishDate 2007
url http://pa.bibdigital.ucc.edu.ar/4012/1/A_Lancioni_Petrashin_Toledo_Dualibe.pdf
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