A low-voltage programmable-gain CMOS amplifier with very-low temperature-drift
A new topology for a LVLP variable-gain CMOS amplifier is presented. Inputand load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries and biases. Excellent gain-accuracy, temperature-insensitivity and wide ran...
Guardado en:
| Autores principales: | , |
|---|---|
| Formato: | Documento de conferencia |
| Lenguaje: | Español |
| Publicado: |
2001
|
| Materias: | |
| Acceso en línea: | http://pa.bibdigital.ucc.edu.ar/3926/1/DC_DeLima_Dualibe.pdf |
| Aporte de: |
| Sumario: | A new topology for a LVLP variable-gain CMOS amplifier is presented. Inputand load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries and biases. Excellent gain-accuracy, temperature-insensitivity and wide range of programmability are thus achieved. Moreover, adaptative biasing improves the common-mode voltage stability upon gain-adjusting. As an example, a 0-40 dB programmable-gain audio-amplifier is designed. Its performance is supported by a range of simulations. For I'DD=1.8 V and 20 dB-nominal gain, one has A/sub v/=19.97 dB, f/sub 3dB/=770 kHz and quiescent dissipation of 378 μW. Over temperatures from -25/spl deg/C to 125/spl deg/C, the 0.1 dB-bandwidth is 52 kHz. Dynamic-range is optimized to 57.2 dB and 42.6 dB for gains of 20 dB and 40 dB, respectively. THD figures correspond to -60.6 dB at V/sub out/=1 V pp and -79.7 dB at V/sub out/=0.5 Vpp. A nearly constant bandwidth for different gains is also attained. |
|---|