Cita APA (7a ed.)

Villa, F. J., Acacio Sánchez, M., & García Carrasco, J. M. (2006). Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures.

Cita Chicago Style (17a ed.)

Villa, Francisco J., Manuel Acacio Sánchez, y José Manuel García Carrasco. Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures. 2006.

Cita MLA (8a ed.)

Villa, Francisco J., et al. Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures. 2006.