Software for multi-core processor-based architectures : Automatic detection of concurrency errors

The main objective of this paper is to propose a software implementation model for concurrency error detection tools that allows reducing process overhead without decreasing its detection capacity. The general model proposed uses software dynamic instrumentation in such a way that an analysis routin...

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Detalles Bibliográficos
Autor principal: Frati, Fernando Emmanuel
Formato: Articulo Revision
Lenguaje:Inglés
Publicado: 2015
Materias:
Ciencias Informáticas
Hardware
instrumentación dinámica
contadores hardware
Processors
errores de concurrencia
HPC
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/50204
http://journal.info.unlp.edu.ar/wp-content/uploads/JCST41-TO-1.pdf
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata

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