Error detection techniques applicable in an architecture framework and design methodology for autonomic SoCs

This work-in-progress paper surveys error detection techniques for transient, timing, permanent and logical errors in system-on-chip (SoC) design and discusses their applicability in the design of monitors for our Autonomic SoC architecture framework. These monitors will be needed to deliver necessa...

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Detalles Bibliográficos
Autores principales: Bouajila, Abdelmajid, Bernauer, Andreas, Herkersdorf, Andreas, Rosenstiel, Wolfgang, Bringmann, Oliver
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2006
Materias:
Ciencias Informáticas
Error
system-on-chip (SoC)
error detection techniques
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/24005
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata

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