Metrics for FIR Filters based on distributed arithmetic in FPGA
In this paper, metrics regarding different architectures for distributed arithmetic based FIR filters in FPGA are presented. Main filter parameters are described as well as diverse design techniques applied: pipelining, bit-serial, digit-serial y bit-parallel. Each filter description was written in...
Guardado en:
Autores principales: | Vázquez, Martín Osvaldo, Simonelli, Daniel Horacio, Acosta, Nelson |
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Formato: | Objeto de conferencia |
Lenguaje: | Inglés |
Publicado: |
2004
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Materias: | |
Acceso en línea: | http://sedici.unlp.edu.ar/handle/10915/22495 |
Aporte de: |
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