Metrics for FIR Filters based on distributed arithmetic in FPGA

In this paper, metrics regarding different architectures for distributed arithmetic based FIR filters in FPGA are presented. Main filter parameters are described as well as diverse design techniques applied: pipelining, bit-serial, digit-serial y bit-parallel. Each filter description was written in...

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Detalles Bibliográficos
Autores principales: Vázquez, Martín Osvaldo, Simonelli, Daniel Horacio, Acosta, Nelson
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2004
Materias:
FIR
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/22495
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