Metrics for FIR Filters based on distributed arithmetic in FPGA
In this paper, metrics regarding different architectures for distributed arithmetic based FIR filters in FPGA are presented. Main filter parameters are described as well as diverse design techniques applied: pipelining, bit-serial, digit-serial y bit-parallel. Each filter description was written in...
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Formato: | Objeto de conferencia |
Lenguaje: | Inglés |
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2004
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Acceso en línea: | http://sedici.unlp.edu.ar/handle/10915/22495 |
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I19-R120-10915-22495 |
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institution |
Universidad Nacional de La Plata |
institution_str |
I-19 |
repository_str |
R-120 |
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SEDICI (UNLP) |
language |
Inglés |
topic |
Ciencias Informáticas Parallel processing Distributed Metrics distributed arithmetic FPGA FIR |
spellingShingle |
Ciencias Informáticas Parallel processing Distributed Metrics distributed arithmetic FPGA FIR Vázquez, Martín Osvaldo Simonelli, Daniel Horacio Acosta, Nelson Metrics for FIR Filters based on distributed arithmetic in FPGA |
topic_facet |
Ciencias Informáticas Parallel processing Distributed Metrics distributed arithmetic FPGA FIR |
description |
In this paper, metrics regarding different architectures for distributed arithmetic based FIR filters in FPGA are presented. Main filter parameters are described as well as diverse design techniques applied: pipelining, bit-serial, digit-serial y bit-parallel. Each filter description was written in VHDL at RTL level. For achieving this goal no relative location (rloc) technique was used what redounds on more generic and expensive designs than those available through Core Generator tool. Implementation has been carried out over FPGAs belonging to Xilinx Virtex II family. |
format |
Objeto de conferencia Objeto de conferencia |
author |
Vázquez, Martín Osvaldo Simonelli, Daniel Horacio Acosta, Nelson |
author_facet |
Vázquez, Martín Osvaldo Simonelli, Daniel Horacio Acosta, Nelson |
author_sort |
Vázquez, Martín Osvaldo |
title |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_short |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_full |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_fullStr |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_full_unstemmed |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_sort |
metrics for fir filters based on distributed arithmetic in fpga |
publishDate |
2004 |
url |
http://sedici.unlp.edu.ar/handle/10915/22495 |
work_keys_str_mv |
AT vazquezmartinosvaldo metricsforfirfiltersbasedondistributedarithmeticinfpga AT simonellidanielhoracio metricsforfirfiltersbasedondistributedarithmeticinfpga AT acostanelson metricsforfirfiltersbasedondistributedarithmeticinfpga |
bdutipo_str |
Repositorios |
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1764820465872797696 |