Fault tolerance in an amplifier system implemented in reconfigurable system on chip platform
This work address the problem of providing fault tolerance to an analog system embedded in a commercial programmable system on chip. The system presents a functionality that has to be maintained despite the presence of faults, without direct human intervention. For detecting a gain fault, we use a b...
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| Autores principales: | , , , |
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| Formato: | Objeto de conferencia |
| Lenguaje: | Inglés |
| Publicado: |
2011
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| Materias: | |
| Acceso en línea: | http://sedici.unlp.edu.ar/handle/10915/121917 |
| Aporte de: |
| Sumario: | This work address the problem of providing fault tolerance to an analog system embedded in a commercial programmable system on chip. The system presents a functionality that has to be maintained despite the presence of faults, without direct human intervention. For detecting a gain fault, we use a built-in self-test strategy that establishes the actual values of gain achievable by the system. A simulated annealing (SA) algorithm finds the hardware configuration. The simulation results show that the strategy is able to maintain its functionality under the presence of catastrophic and deviation faults. In addition, SA presents better performance than an exhaustive search method. |
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