Low-cost dc bist for analog circuits: a case study
This paper presents a DC analog testing technique based on a simple voltage comparison of the highest sensitivity node, which is found by simulation. The technique is a structural, fault driven testing approach and can be applied to any analog circuit with very few extra added circuitry. A proof of...
Guardado en:
| Autores principales: | , , , |
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| Formato: | conferenceObject |
| Lenguaje: | Inglés |
| Publicado: |
Facultad de Ciencias Exactas, Físicas y Naturales
2021
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| Materias: | |
| Acceso en línea: | http://hdl.handle.net/11086/20347 |
| Aporte de: |
| Sumario: | This paper presents a DC analog testing technique based on a simple voltage comparison of the highest sensitivity node, which is found by simulation. The technique is a structural, fault driven testing approach and can be applied to any analog circuit with very few extra added circuitry. A proof
of concept has been implemented in a 65nm low-voltage transconductor, showing good fault coverage for both catastrophic and parametric faults. |
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